Regviz

Silicon Labs /BGM240PB32VNA /USART0_NS /TRIGCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as TRIGCTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32BG22C222F352GM40/USART1_S/TRIGCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RXTEN)RXTEN 0 (TXTEN)TXTEN 0 (AUTOTXTEN)AUTOTXTEN 0 (TXARX0EN)TXARX0EN 0 (TXARX1EN)TXARX1EN 0 (TXARX2EN)TXARX2EN 0 (RXATX0EN)RXATX0EN 0 (RXATX1EN)RXATX1EN 0 (RXATX2EN)RXATX2EN

Description

No Description

Fields

RXTEN

Receive Trigger Enable
TXTEN

Transmit Trigger Enable
AUTOTXTEN

AUTOTX Trigger Enable
TXARX0EN

Enable Transmit Trigger after RX End of
TXARX1EN

Enable Transmit Trigger after RX End of
TXARX2EN

Enable Transmit Trigger after RX End of
RXATX0EN

Enable Receive Trigger after TX end of f
RXATX1EN

Enable Receive Trigger after TX end of f
RXATX2EN

Enable Receive Trigger after TX end of f

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data